Parasitic Capacitance

Parasitic capacitance (also called stray capacitance) is an unintended capacitance that occurs between parts of an electronic component or circuit due to their proximity to each other.
It is not designed as part of the circuit, but it exists due to the physical layout and material properties of the components.
 



Basic Capacitance Principle:

Capacitor is a device that stores electrical energy by accumulating electric charges on two closely spaced surfaces that are insulated from each other.

C = ε.A/d  

  • C = Capacitance (F)
  • ε = Permittivity of the dielectric
  • A = Area of overlapping conductors
  • d = Distance between them

Even when we don’t intend to create a capacitor, this physical reality applies. Hence, stray or parasitic capacitance arises in real-world circuits.


Why Does Parasitic Capacitance Exist?

Any two conductive elements separated by an insulator (dielectric) have the ability to store electric charge, forming a capacitor — even if unintentionally. In high-speed or high-frequency circuits, these effects become non-negligible.

Causes of Parasitic Capacitance

  1. PCB Traces Close Together
    • Long and parallel traces on a PCB can create capacitive coupling.
       
  2. Adjacent Components
    • Pins on an IC package or connector can have inter-pin capacitance.
       
  3. Component Leads & Sockets
    • Leads and socket connectors can act like capacitive plates.
       
  4. Multilayer PCBs
    • Power and ground planes separated by a dielectric form capacitors.
       
  5. Cables
    • Coaxial or twisted-pair cables can have parasitic capacitance between conductors.
       

Example 1: Parasitic Capacitance in a PCB Trace

Two traces running side-by-side for 10 cm can exhibit a parasitic capacitance of a few picofarads (pF). At high frequencies, this could lead to signal distortion or crosstalk.

Example 2: MOSFET Gate Capacitance

In a switching circuit, the drain-gate parasitic capacitance in a MOSFET can slow down switching transitions, increasing power loss.


Parasitic Capacitance effect on Circuits

A. In Analog Circuits:

  • Low-pass Filtering: Parasitic capacitance with signal resistance forms RC filters → bandwidth loss.
  • Miller Effect: In amplifiers, feedback capacitance is amplified, reducing bandwidth.
     

B. In Digital Circuits:

  • Rise/Fall Time Degradation: Extra capacitance loads the driver, causing slow edges.
  • Crosstalk: Capacitive coupling allows signal energy to “leak” between traces.
  • Timing Skew: Delays in signal transitions due to unequal parasitic loading.
     

C. In Power Electronics:

  • Switching Losses: MOSFET drain-gate capacitance increases transition energy.
  • EMI Emission: Fast switching of capacitively coupled nodes causes high-frequency noise.
     

Disadvantages of Parasitic Capacitance

1. Performance Limitations

  • Slower signal transitions.
  • Limits max operating frequency in high-speed designs.

2. Signal Integrity Issues

  • Causes waveform distortion, rise/fall time degradation
  • Overshoot, ringing, and degraded eye diagrams in digital interfaces.

3. Power Loss

  • Each switch charge/discharge cycle consumes energy:

E = 1/2CV2

4. Amplifier Instability

  • Phase shift due to capacitance can cause oscillations.
    Amplifiers may become unstable due to unintentional feedback paths.

5. Increased EMI

  • Capacitively coupled paths can radiate or pick up noise.


Role of Parasitic Capacitance in EMI/EMC 

A. EMI (Electromagnetic Interference)

  • Stray Capacitance forms coupling paths for high-frequency signals.
  • Unshielded traces with parasitic Capacitance can radiate energy like dipole antennas.

B. EMC (Electromagnetic Compatibility)

  • Parasitic C makes circuits vulnerable to external RF fields.
  • Inter-device capacitance (e.g., between chassis and ground) can allow conducted interference.
     

Example: Power Converter EMI

In a buck converter, the drain of a MOSFET has high dV/dt. Parasitic capacitance between the drain and heatsink or ground can cause common-mode EMI, leading to EMC test failures.



Mitigation Techniques & Solutions

A. PCB Design Techniques

  • Trace Separation: Increase distance between high-speed or sensitive lines.
  • Minimize Overlap: Avoid overlapping high-speed traces on adjacent layers.
  • Use Ground Planes: Acts as a reference and return path, reduces loop area.
  • Short Trace Lengths: Shorter paths reduce distributed parasitic capacitance.

B. Component Placement

  • Place analog and digital parts separately.
  • Keep high-impedance nodes away from switching signals.

C. Guard Rings & Shielding

  • Grounded copper around sensitive analog lines to absorb capacitive noise.
  • Use shielded cables or enclosures where needed.

D. Termination Techniques

  • Use proper series or parallel termination to match impedance and reduce reflections.
  • Helps prevent additional capacitive loading effects.

E. Differential Signaling

  • Common in LVDS, USB, Ethernet.
  • Rejects common-mode noise from capacitive coupling.

F. Simulation and Modeling

  • Use tools like LTspice, Altium, Ansys HFSS to simulate parasitic behavior.
  • Extract layout parasitics and optimize during design.

 



Recent Posts

Automotive Pulses


Automotive pulses refer to specific transient voltage waveforms that occur in a vehicle's electrical system. These pulses are defined by standards (like ISO 7637, SAE J1113, or LV 124) and used primarily for EMC (Electromagnetic Compatibility) testing of automotive electronic components and systems.

These tests simulate real-world disturbances (like load dumps, switching transients, inductive kicks) to ensure components can survive and operate correctly in harsh automotive environments.

Modern vehicles contain many ECUs, sensors, and actuators. They're exposed to:

  • Alternator spikes
  • Battery disconnection
  • Relay switching
  • Ignition transients
  • Electrostatic discharge (ESD)

To ensure reliable operation, these pulses are simulated and tested in labs.


Pulses as per ISO 7637-2

ISO 7637-2 (for 12V and 24V systems)

The most widely used for electrical transients on supply lines.

Pulse

Description

Typical Cause

Pulse 1

Negative spike

Battery disconnect while inductive loads are ON

Pulse 2a/2b

Positive/negative spikes

Switching of inductive loads

Pulse 3a/3b

Fast transients

Arising from relay contact bounce

Pulse 4

Voltage drop

Engine cranking

Pulse 5

Load dump

Battery disconnect while alternator is charging

 


 

Pulse Characteristics (ISO 7637-2)

Pulse 1

  • Negative Spike
  • Cause: Battery disconnection from Inductive Loads (motor, Solenoid)
  • Affect: Power supply circuit, Microcontroller
     

 

Parameters Nominal 12 V system Nominal 24 V system
Us −75 V to −150 V −300 V to −600 V
Ri 10 Ω 50 Ω
td 2 ms 1 ms
tr 1 μs 3 μs
t1 ≥0.5 s
t2 200 ms
t3 <100 μs



Pulse 2a

  • Positive Spike
  • Cause: Sudden interruption of current due to sudden disconnection of large loads
  • Affect: Voltage regulators and semiconductors devices
     


 

Parameters Nominal 12V & 24V system
Us +37 V to +112 V
Ri 2 Ω
td 0.05 ms
tr 1 μs
t1 0.2 s to 5 s


 

Pulse 2b

  • Negative Spike
  • Cause: Alternator field decay, Alternator’s field winding de-energises after engine shutdown
  • Affect: ECU Reset

     



 

Parameters Nominal 12 V system Nominal 24 V system
Us 10 V 20 V
Ri 0 Ω to 0.05 Ω
td 0.2 s to 2 s
tr 1 ms
t12 1 ms
t6 1 ms



Pulse 3a

  • Fast Transients – Negative
  • Cause: Relay chatter (very fast edge), switching processes. Characteristics of these transients are influenced by distributed capacitance and inductance of the wiring harness.
  • Affect: Signal Interference and component malfunction
     


 

Parameters Nominal 12 V system Nominal 24 V system
Us −112 V to −220 V −150 V to −300 V
Ri 50 Ω
td 150 ns ± 45 ns
tr 5 ns ± 1.5 ns
t1 100 μs
t4 10 ms
t5 90 ms



Pulse 3b

  • Fast Transients – Positive
  • Cause: Relay chatter (very fast edge), switching processes. Characteristics of these transients are influenced by distributed capacitance and inductance of the wiring harness.
  • Affect: Sensors and controllers
     


 

Parameters Nominal 12 V system Nominal 24 V system
Us +75 V to +150 V +150 V to +300 V
Ri 50 Ω
td 150 ns ± 45 ns
tr 5 ns ± 1.5 ns
t1 100 μs
t4 10 ms
t5 90 ms



Pulse 4

  • Cranking Pulse - Slow Negative
  • Cause: Supply voltage reduction caused by energising starter motor of internal combustion engine.
  • Affect: Sensors and controllers
     




 

Parameters Nominal 12 V system Nominal 24 V system
Us − 6V to − 7V − 12V to − 16V
Ua − 2.5V to − 6V with |Ua| ≤ |Us| − 5V to − 12V with |Ua| ≤ |Us|
Ri 0 Ω to 0.02 Ω
t7 15 ms to 40 ms 50 ms to 100 ms
t8 ≤ 50ms
t9 0.5 s to 20 s
t10 5ms 10ms
t11 5ms to 100ms 10ms to 100ms



Pulse 5a – Load Dump

  • Unsuppressed Alternator Surge- Without Protection
  • In the event of a discharged battery being disconnected while the alternator is generating charging current and with other loads remaining on the alternator circuit at this moment.
  • Affect: ECU, Sensor, Power circuit

     
Parameters Nominal 12 V system Nominal 24 V system
Us 65V to 87V 123V to 174V
Ri 0.5 Ω to 4 Ω 1 Ω to 8 Ω
td 40ms to 400ms 100ms to 350ms
tr 10ms



Pulse 5b – Load Dump

  • Suppressed Alternator Surge- with protection (like Zener diode, TVS diode)
  • In the event of a discharged battery being disconnected while the alternator is generating charging current and with other loads remaining on the alternator circuit at this moment.
  • Affect: ECU, Sensor, Power circuit
     


 

Parameters Nominal 12 V system Nominal 24 V system
Us 65V to 87V 123V to 174V
Us* As specified by manufacturer
td 40ms to 400ms 100ms to 350ms

 


 

Testing Setup

Usually tested in the lab using an EMC test bench with:

  • Pulse generators
  • Coupling/decoupling networks
  • Oscilloscopes
  • Electronic loads or real DUTs


The DUT (Device Under Test) must withstand or operate normally depending on the pulse.


Other Standards

  • SAE J1113 – Similar to ISO 7637, North American usage
  • LV 124 / LV 148 – German standards for 12V/48V systems (used by BMW, VW, Daimler, etc.)
  • ISO 16750-2 – Broader set including electrical load, jump start, reverse polarity, etc.

 


Conducted Emission


Conducted emissions refer to electromagnetic disturbances that are transmitted through conducting wires or cables connected to an electrical or electronic device. These emissions can propagate along power lines, signal lines (such as data cables), and any other conductive paths that are connected to the device.

Here's a detailed breakdown of conducted emissions:

Sources:

Conducted emissions originate from various sources within electronic equipment:

  1. Power Supplies: Switching power supplies and transformers can generate conducted emissions due to switching transients and harmonics.

  2. Electronic Circuits: Digital circuits, especially those with fast switching speeds, can produce conducted emissions through power and signal lines.

  3. Motors and Drives: Electric motors and motor drives can introduce conducted emissions into power lines due to switching frequencies and power modulation.

  4. Cables and Connectors: Poorly shielded or improperly grounded cables can act as antennas, radiating conducted emissions.
     

Frequency Range:

Conducted emissions typically cover a wide frequency range, often from a few kilohertz (kHz) up to several hundred megahertz (MHz), depending on the nature of the emitting device and the frequency of the signals or power being processed.

  • Low Frequency Range (LF): Typically below 150 kHz, includes power line harmonics and switching noise from power supplies.

  • Radio Frequency Range (RF): Spans from 150 kHz to several hundred MHz, encompassing emissions from digital circuits, clock signals, and other high-frequency components.

Measurement and Testing:

Conducted emissions are typically measured using specialized equipment such as spectrum analyzers and conducted emission measurement receivers. Testing is conducted with the device under test (DUT) connected to a standardized test setup that simulates real-world operating conditions. Measurements are taken across specified frequency ranges to ensure compliance with applicable EMC standards.

Test Setup
 


 

Test Instrument

Below are the some Major Test equipment, required for Conducted Emission Testing

  1. EMI Receiver

  2. Line Impedance Stabilization Network (LISN)

  3. Pulse Limiter

  4. RF Cables

Test Parameters

  1. Frequency Range: 9kHz to 30MHz (depends on the Product standard)

  2. Detector: Quasi-Peak, Average

Test Procedure

  1. Setup EUT (Equipment Under Test) at the designated place, 0.8m high on the insulated table.

  2. Table must be kept on the Ground Reference plane and at a distance of 0.4m from the Vertical coupling plane.

  3. EUT should be energised through LISN with the rated Voltage and current and to be set in the highest configuration to achieve max level of emission from it.

  4. RF cable should be connected between LISN and EMI Receiver.

  5. Set the desired frequency range, limit lines and other parameters in EMI Receiver to receive the EMI signal from the EUT.

  6. Select the peaks closure to limit line and measure the Q-Peak and Average values for final measurement.

  7. Repeat step 5 & 6 for every individual line and neutral.

  8. Capture the data like emission level in dbµV, Limit at that particular frequency, calculate the margin to mention in the final report. 

  9. There are different limit lines as per different product standards.


Most of the standards refers to the below limits lines based on the end use of the product. 

Conducted Emission limits_Class A

Frequency Range
(MHz)
Quasi Peak
(dbμV)
Average
(dbμV) 
0.15 - 0.5 79 66
0.5 - 30 73 60



Conducted Emission limits_Class B

Frequency Range
(MHz)
Quasi Peak
(dbμV)
Average
(dbμV) 
0.15 - 0.5 66-56 56-46
0.5 - 5.0 56 46
5.0 - 30 60 50

 

Electromagnetic Emissions from the DUT should be less than the limits mentioned above. 

Conducted Emission Spectrum with both the Class A and Class B limits. 

In summary, conducted emission testing ensures that devices meet regulatory EMC limits, contributing to reliable and interference-free operation across electrical and electronic systems.


Common-Mode vs. Differential-Mode Noise


Electrical Noise

Electrical noise is any unwanted signal superimposed on a desired electrical signal that can distort, interfere, or reduce signal fidelity. In high-speed circuits and EMC analysis, this noise is typically classified as:

  • Differential-Mode (DM) Noise

  • Common-Mode (CM) Noise

These two have different origins, transmission paths, and countermeasures.



1. Differential-Mode Noise – “Normal-mode noise”

Differential-mode noise is the voltage difference between two conductors of a signal or power line. It represents the intentional signal path where the noise rides in opposition across the two conductors.


Current Flow:

The noise flows in opposite directions in a loop between the two wires. If one conductor has a +5V spike and the other has -5V, the differential noise is 10V.


Example Use Cases:

  • Power rails: +V and GND in DC systems

  • Communication: USB, HDMI, Ethernet pairs

  • Analog signals: Sensor lines in instrumentation


Typical Sources:

  • Switch-mode power supplies (SMPS) – due to rapid switching

  • High-speed data lines – signal reflections, ringing

  • Magnetic coupling – between traces or cables

  • Load changes – from motors, solenoids, or relays


Mitigation Strategies:

  • Differential-mode filters: Series inductors with capacitors across lines

  • Matched impedance design: Prevents signal reflection and ringing

  • Twisted pairs: Cables twisted to cancel out opposing fields

  • Short trace lengths: Reduces antenna effect



2. Common-Mode Noise – “Ground-referenced noise”

Common-mode noise appears equally and in phase on both conductors relative to a common reference point, usually system ground or chassis.


Current Flow:

Both wires carry the noise in the same direction, and the return path flows through the ground plane, earth, or shielding.


Real-World Example:

  • Long USB cables pick up RF noise equally on both data lines.

  • AC power lines exposed to EMI from nearby radio towers or industrial machines.


Typical Sources:

  • Electrostatic coupling: From nearby high-voltage lines

  • Radiated emissions: Antenna-like behavior of cables or traces

  • Ground potential differences: Between system components (e.g., USB ground loop)

  • Parasitic capacitance: Between PCB traces and the chassis


Mitigation Strategies:

  • Common-mode chokes: High impedance to CM signals, low to DM signals

  • Shielded cables and connectors: With 360° termination to chassis

  • Isolated grounds: Breaks in ground loops

  • Ferrite beads/clamps: On external cables



3. Visualizing the Current Paths

 

Noise Type: Differential Mode

Current Direction: Opposite directions on each line, Reference Point: Across the pair, Return Path: One conductor to another

Noise Type: Common Mode

Current Direction: Same direction on both lines, Reference Point: Ground or chassis, Return Path: Through system or earth ground

 



4. Importance in EMC Testing


Emissions:

  • Differential-mode emissions are mostly conducted (via power/signal lines).

  • Common-mode emissions often become radiated, as CM currents form large loop areas (acting like antennas).


Compliance Implications:

  • Regulatory bodies (e.g., FCC, CISPR, IEC) test both emission types.

  • CISPR 22/32 and FCC Part 15 focus heavily on common-mode conducted emissions in lower frequency bands (150 kHz–30 MHz).



5. Filtering Techniques Comparison

Filter Type: CM Filter

Effective Against:  Common-mode noise, Components Used:  Common-mode choke, Y-capacitors

Filter Type: DM Filter

Effective Against: Differential-mode noise, Components Used:  Series inductors, X-capacitors

Notes:

  • Y-capacitors connect from line to ground (handle CM).

  • X-capacitors go across the line pair (handle DM).



6. Example: SMPS Input Filtering

In a switch-mode power supply, both noise types are generated:

  • Differential noise arises from the switching node oscillations.

  • Common-mode noise results from parasitic capacitance between high-frequency switching nodes and the chassis.


The input filter typically includes:

  • X-capacitor across line and neutral (DM)

  • Y-capacitors from line/neutral to ground (CM)

  • Common-mode choke for both conductors



7. Application-Specific Impacts


High-Speed Digital Systems:

  • Differential signaling (LVDS, HDMI, USB) relies on clean DM paths. Noise degrades data integrity (eye diagrams, jitter).

  • CM noise can cause cross-talk between pairs or fail EMC radiated tests.

Automotive:

  • CM noise is a major concern due to long wire harnesses acting as antennas.

  • Standards like ISO 11452 and CISPR 25 require thorough CM filtering.

Medical Devices:

  • Safety and immunity to external EMI are critical—isolation transformers, CM chokes, and filtering are used to ensure patient safety and compliance (e.g., IEC 60601-1-2).



Conclusion
 

Aspect

Differential-Mode Noise

Common-Mode Noise

Flow Direction  Opposite on conductors  Same on both conductors
Reference Between lines Against ground or chassis
Typical Source Internal circuit switching External EMI, parasitic coupling
Testing Concern Conducted emissions Radiated + conducted emissions
Mitigation  X-caps, twisted pairs, impedance match CM chokes, Y-caps, shielding


Both types of noise must be addressed for:

  • Regulatory compliance

  • Signal integrity

  • Functional reliability

Designers should always measure both types during EMC testing and implement layered filtering and shielding strategies.